Faculty

Mrs.E.Rajalakshmi

 eriece@tce.edu

15

PUBLICATIONS       

5

SEMINAR, CONFERENCE, WORKSHOP ATTENDED

 Educational Qualification

DEGREE BRANCH INSTITUTE YEAR
B.E Electronics & Communication Engineering Mepco Schlenk Engineering College, Sivakasi 2012
M.E VLSI Design Mepco Schlenk Engineering College, Sivakasi 2016
PHD VLSI Device Modeling Anna University, Chennai 2016

 Experience

PERIOD NO OF YEARS DESIGNATION INSTITUTION
02-01-2013 to 09-07-2014 1.5 Software Engineering Analyst Accenture services private limited, Chennai
27-06-2016 to 10-05-2019 3 Assistant Professor Mepco Schlenk Engineering college, Sivakasi
04-01-2021 to 31-12-2022 2 Business Analyst Ariv Executions, Thiagarajar Advance Research Center, Thiruparankundram, Madurai
05-01-2023 to 17-06-2025 2.5 Research Fellow Thiagarajar College of Engineering
18-06-2025 to 01-01-0001 0.1 Assistant Professor Thiagarajar College of Engineering, Madurai

 Publications

 Journals
  1. E.Rajalakshmi, R.Shantha Selva Kumari,Very large‐scale integration architecture for wavelet‐based ECG signal adaptive coder., IET Signal Processing, Vol 13, 2019
  2. E. Rajalakshmi, N.B. Balamurugan, M.Hemalatha, M.Suguna, A Novel high-voltage DMG Fe-doped AlGaN/AlN/GaN HEMTs with sheet charge density model, Microelectronics Journal, 150, 106285, August 2024
  3. E. Rajalakshmi, N.B. Balamurugan, M. Suguna, D. Sriram Kumar, A new quasi-3D analytical framework for channel potential and threshold voltage in triple material gate nanosheet MOSFETs, Microelectronics Journal, 161, 106710, July 2025
  4. E. Rajalakshmi, N.B. Balamurugan, M. Suguna, D. Sriram Kumar, Nanoengineered Triple Material Gate Nanosheet MOSFETs for Advanced SARS-CoV-2 Biosensing, Silicon, Vol.17 (14), pp. 3375-3389, September, 2025
  5. VLSI Implementation of Binary to Gray Converter Using Asynchronous Circuits in FPGA, International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering, Vol. 7, 2018
 Conferences
  1. E. Rajalakshmi, N.B. Balamurugan, V.Karutharaja, M. Suguna, A novel Framework for biosensing sensitivity in triple material surrounding gate TFETs, First National Research Conclave on Sustainability: Advancing towards a Resilient Future, Thiagarajar College of Engineering, Madurai, 2025
  2. E. Rajalakshmi, M.Hemalatha, N.B. Balamurugan, MA Tujaasree, Leveraging FETs in Robotic Biosensors for Biomedical Applications., International Conference - ICTEST- Government Model Engineering College, Kochi, (IEEE Explore), March 2025
  3. E.Rajalakshmi, M.Kaviya, M.Suguna, N.B. Balamurugan, A Critical Overview on Technological Progress in Nanosheets, International conference -ICETITE - VIT, Vellore, (IEEE Explore) , Feb 2024
  4. E.Rajalakshmi, N.B. Balamurugan, A New Perspective on Sensitivity for Biosensing Applications in Nanocavity-Embedded Dual Metal Surrounding Gate TFETs, International Conference -RMKMATE – RMK Engineering College, Chennai, (IEEE Explore), Nov 2023
  5. Performance anlayis of full swing and low swing clock distribtuion network, ICAETSD– Karpagam College of Engineering, Coimbatore, 2017
  6. Enhanced Security for ATM through an instantaneous action against robbery, NCCT– Mepco Schlenk Engineering College, Sivakasi, 2017
  7. Investigating the Effect of Self-Heating and Parameter Variability on the Output Characteristics of Dielectric Pocket Surrounding Gate Tunnel FETs, First National Research Conclave on Sustainability: Advancing towards a Resilient Future, Thiagarajar College of Engineering, Madurai, 2025
  8. Implementation of Equivariant Holomorphic Filters & Application to Health Vehicle Detection, CSPCT – Kamaraj College of Engineering and Technology, Virudhunagar, 2012
  9. Development of Wavelet based Signal Compression Algorithm using Adaptive Coder in FPGA, ICIIECS – Karpagam College of Engineering, Coimbatore, 2016
 Books
  1. E Rajalakshmi, NB Balamurugan, M Hemalatha, M Suguna, From Classical to Quantum: Ballistic Transport in Nanosheet FETs, Book: Classical to Quantum Transport in Multi-Dimensional Field Effect Transistors, CRC Press, PP. 96-120, September, 2025

 Seminar, Conference, Workshop Attended

  1. Women in Engineering: Exploring emerging technologies for a smarter future, Organized by the WIE, IEEE Subsection Silchar Subsection. A joint program by NIT Manipur and NIT Silchar, 01-12-2025 to 05-12-2025
  2. AI-Enabled Semiconductor IC Design and Performance of Nanoscale Devices in Tamil language at VELLORE INSTITUTE OF TECHNOLOGY CHENNAI OFF CAMPUS sponsored by ALL INDIA COUNCIL FOR TECHNICAL EDUCATION Nelson Mandela Marg, Vasant Kunj, New Delhi, 19-11-2025 to 21-11-2025
  3. "AIML-Based Controller Design and Deployment on Real-Time Platforms" (AMCDDRP-2025) organized by National Institute of Technology Rourkela, Odisha, India, 05-11-2025 to 09-11-2025
  4. The Chronicles of Silicona: Quest for Novel Materials and Enchanted Devices, Thiagarajar College of Engineering, Madurai, 18-11-2024 to 30-11-2024
  5. Ferroelectric Devices, Circuits and Architectures for AI Hardware Design, IEEE EDS Delhi Chapter (Virtual), 12-09-2024 to 01-01-0001

 Seminar, Conference, Workshop Organised

  1. GYAN MITRA’19, IE (I) – Students Chapter – Section C Incharge, Mepco Schlenk Engineering, Sivakasi, 2019, 08-02-2019 to 09-02-2019
  2. GYAN MITRA’18, IE (I) – Students Chapter – Section C Incharge, Mepco Schlenk Engineering, Sivakasi, 2018, 16-02-2018 to 17-02-2018
  3. GYAN MITRA’17, IE (I) – Students Chapter – Section C Incharge, Mepco Schlenk Engineering, Sivakasi, 2017, 17-02-2017 to 18-02-2017

 Lectures Delivered

TOPIC DELIVERED AT PERIOD
EDA Tools for VLSI Design Thiagarajar College of Engineering, Madurai 15-12-2025 to 20-12-2025
Design of SoC using FPGA Mepco Schlenk Engineering, Sivakasi. 08-02-2019 to 09-02-2019
High Level Synthesis using Vivado Design Suite Mepco Schlenk Engineering, Sivakasi. 16-02-2018 to 17-02-2018
Hands on Session on EDK & SDK Tools for FPGA Mepco Schlenk Engineering, Sivakasi. 17-02-2017 to 18-02-2017

  Awards and Honours

  1. Patent Application Granted, Patent Number: 585332, Application Number: 202541080742, N B Balamurugan, E Rajalakshmi, V Charumathi, V Karutharaja, NANOSHEET MOSFET FOR COMPREHENSIVE WATER ANALYSIS, 26/08/2025, Patent-Intellectual Property India
  2. Secured 1st Rank in University Examination in Post graduation, Anna University, Chennai
  3. Spot Achievement Award – Accenture Services Private Limited, Chennai, Accenture Services Private Limited, Chennai
  4. Spot Achievement Award – Accenture Services Private Limited, Chennai, Accenture Services Private Limited, Chennai
  5. Secured 34th University Rank in Anna University, Chennai during Under graduation, Anna University, Chennai

 Membership

NAME OF SOCIETY DETAILS PERIOD
The Institution Of Electronics And Telecommunication Engineers (IETE) AM-500614
The Indian Society for Technical Education (ISTE) LM-117645

  Other Achievements

  1. NPTEL course - Introduction to programming in C - secured Elite
  2. Secured Domain Scholar in VLSI Design - NPTEL course
  3. Secured Discipline Star - NPTEL course
  4. NPTEL course - Microprocessors and Microcontrollers – secured Elite plus Silver and Topper 2 %
  5. NPTEL course - System Design Through Verilog – secured Elite plus Gold and Topper 2%
  6. NPTEL course – Digital Circuits – secured Elite plus Silver and Topper 1%
  7. NPTEL course – Introduction to Semiconductor Devices – secured Elite plus Silver and Topper 5%
  8. NPTEL course – Analog Circuits – secured Elite
  9. Secured 34th University Rank in Anna University, Chennai during Under graduation