V.VinothThyagarajan

vinoth.thyagu@gmail.com

Educational Qualification

DEGREE BRANCH INSTITUTE YEAR
B.E Electronics and Communication Engineering Thiagarajar College of Engineering 2003
ME Wireless Technologies Thiagarajar College of Engineering 2005
Ph.D Power Integrity for Three Dimensional Integrated Circuits Anna University,Tiruenveli 2016

Experience

PERIOD NO OF YEARS DESIGNATION INSTITUTION
13-07-2005 to 02-07-2019 14 Assistant Professor Thiagarajar College of Engineering, Madurai.

Journals

  1. V. Vinoth thyagarajan, P. Jeyapandi, Dr. S. Rajaram, "Analytical Modeling of Power Supply Noise in 3-D Integrated Circuits", IJAER, RIP, Volume 10 N0.55 (2015)
  2. V. Vinoth thyagarajan, S. Preetham Kumar, U. Surya Gurumoorthy, P. Nandhakumar, S. Rajara,"Delay Analysis in Cylindrical and Coaxial TSV for 3D IC", IJAER:Volume 10 No. 20 (2015) pg:18999-19003.
  3. V. Vinoth thyagarajan, S. Rajaram, K. Vignesh, G. Manirajan,"Reducing IR-Drop in Power Distribution Network for Integrated Circuits", International Journal of Applied Research, Vol. 10 No.20 (2015)pg 16449-16452.
  4. V. Vinoth thyagarajan and S. Rajaram, "3D ICs-Power Analysis Using Cylindrical and Co-axial Through Silicon Via(TSV)", Research Journal of Applied Sciences, Engineering and Technology 9(2): 138-144, 2015
  5. V.VinothThyagarajan, S.Rajaram, Low Power Implementation of Residue Number System for Public Key Cryptography, CIT Journal of Research Volume 1, May 2010
  6. V. Vinoth thyagarajan, R. Sundaraganesh, S. Sundaresan and Dr. S. Rajaram, FPGA Implementation and Power Analysis of All-Digital PID Controller, IJAER, Research India Publication, Volume 10 No.55 (2015)

Conferences

  1. V. Vinoth thyagarajan, G. Vidhyasri, S. Ezhil, V. Veerasuganthi,"Analysis of Power Supply Noise for 3D Integrated Circuits". NCCT16, 2016
  2. V. Vinoth thyagarajan, N. Silambarasan, Dr. S. Rajaram, "Analysis of Substrate Induced Noise in Annular and Co-axial Through Silicon Via (TSV) used in 3D ICs", 2016
  3. V. Vinoth thyagarajan, S. Mathivanan,"A new topology for the design of 3rd order V-mode Univeral Filter with 1 OTRA using Alpha power model", NCCT 2016.
  4. V. Vinoth thyagarajan, M. Divya, S. Ezhil,"Analysis of Substrate induced noise in 3D IC", NCCT2016
  5. V. Vinoth thyagarajan, S. Rajaram, S. Vidhya,"Three Dimensional ICs- Power analysis for Cylindrical and Co-axial Through Silicon VIA(TSV)", NCWCS, Pg 111-115, 2014
  6. v. vinoth thyagarajan, Dr. S. Rajaram, S.R. Romaa,"Three Dimensional IC power Delivery: Analysis and Challenges" NCSP, Communication and VLSI Design pg 360-364, 2013
  7. V. Vinoth thyagarajan, S. Mariselvi, K. Muthura, S. Sangeetha, "FPGA Implementation of Low Power 64-Point Radix 4 FFT processor for OFDM system"(2011)
  8. V.VinothThyagarajan, D.Thirumalaichelvam An FPGA implementation of LDPC encoder of mutiband OFDM Transmitter using Hybrid H Matrix, Emerging Trends in Communication, Computing and Networks,2007
  9. V.VinothThyagarajan, D. Prabhakaran, FPGA implementation of floating Point multiplire and Adder for FFT algorithms, Microwave and Optical Communication, 2009
  10. V.VinothThyagarajan, D. Prabhakaran, Perfomance Analysis of Multipliers for Reconfigurable Architectures, Emerging Trends in Engineering and Technology, 2009
  11. V.VinothThyagarajan, C.Rajarajachozhan, Efficient Power Reduction Programmable Routing Circuitry for FPGA, Information Networking And Communication Technologirs, 2010
  12. V.VinothThyagarajan, C.Rajarajachozhan, V.R.Venkatasubramani, S.Rajaram, Low Power Implementation of Residue Number System for Public Key Cryptographic Applications, Emerging Trends on Information and Communication Technologies, 2010
  13. V.VinothThyagarajan,V.R.Venkatasubramani,V. Samthirapandi Efficient Systolization of FIR Filter using Distributed Arithemetic, Microwave and Optical Communication, 2009
  14. S.Rajaram, V.VinothThyagarajan, C.Rajarajachozhan, V.R.Venkatasubramani, C.Rajarajachozhan, V.R.Venkatasubramani, Low power Implementation using Residue Number System for Public Key Cryptographic Applications, Emerging Trends in Information and Communication Technologies, Sethu Institute of Technology, Madurai,
  15. V.VinothThyagarajan, K.Kalyani, S.Rajaram, FPGA implementation of FFT/IFFT for WLAN, TIMA2009, Anna University, MIT campus, Chennai.,
  16. V.VinothThyagarajan, FPGA Implementation Of the Water Marking Encoder, National Conference On VLSI Design And Testing, 2006
  17. V.VinothThyagarajan, A Neural Approach To Extract The Rgb Layer From Multispectral Satellite Images, National Conference On Artificial Neural Networks And Fuzzy System, Annamalai University, 2002

Industry Interactions

COMPANY NAME NATURE OF WORK PERIOD DETAILS
Texas Instruments Gone through training and participated in the process of curriculum design for Analog Electronics and Experiments based on Operational Amplifiers 01-09-2009 to 31-12-2010 Curriculum Design

Seminar, Conference, Workshop Attended

  1. VDAT,PSG Tech,Coimbatore, 16-04-2014 to 16-04-2014
  2. Outcome based Education,TCE, 01-10-2013 to 01-11-2013
  3. TWO WEEK WORKSHOP ON ANALOG VLSI, THIAGARAJAR COLLEGE OF ENGG., MADURAI., 4-6-2007 to 15-6-2007
  4. TWO DAY WORKSHOP ON FPGA IMPLEMENTATION OF SOFTWARE RADIO TRANSCEIVERS, NATIONAL INSTITUTE OF TECHNOLOGY, TRICHY, 29-12-2006 to 31-12-2006
  5. A SHORT TEREM COURSE ON LABVIEW SOFTWARE BY VIRTUAL INSTRUMENTS, P.S.G TECH, COIMBATORE, 13-11-2006 to 17-11-2006
  6. SHORT TERM COURSE ON VHDL & FPGA DESIGN FOR WIRELESS BASEBAND SYSTEMS , THIAGARAJAR COLLEGE OF ENGG, MADURAI., 21-9-2005 to 24-9-2005
  7. WORKSHOP ON RECENT TRENDS IN WIRELESS TECHNOLOGIES, THIAGARAJAR COLLEGE OF ENGG.,MADURAI., 18-04-2003
  8. GEOMATICS 2002 CONFERENCE ON IT ENABLED SPATIAL DATA SERVICES, CENTRE FOR REMOTE SENSING, BHARATHIDASAN UNIV.,TRICHY, 18-09-2002 To 20-09-2002 
  9. TUTORIAL ON REMOTE SENSING & GIS, CENTRE FOR REMOTE SENSING, BHARATHIDASAN UNIV., TRICHY, 16-09-2002 and 17-09-2002

Seminar, Conference, Workshop Organised

  1. Two weeks ISTE workshop on analog electronics conducted by IIT,Kharagpur, 04-06-2013 to 14-06-2013
  2. Work shop on System Integration challenges and solutions for mixed signal design, 04-07-2011 to 05-07-2011
  3. Workshop on FPGA based system design using EDA tools, 22-12-2010 to 23-12-2010
  4. Work shop on Solid state device modeling, 26-11-2010 to 28-11-2010

Membership

NAME OF SOCIETY DETAILS PERIOD
Indian Society of Geomatics (ISG)   Life Time Member --